Theory & Operation

Theory and Operation

 

Here you will find links to various information discussing theory and operation of the KPU55 CPU and C Compiler files.

 

 

 

 

 

KCC - C Compiler for KPU55 and other CPUs

 

It is best to start learning with scanner.l and parser.y. They will tell you what code to look at next.

gencode.c Describes how gencode.c works
genINSTR.c Describes how genINSTR.c works
kcc.h Describes usage of kcc.h
cpu_defs.h Describes usage of cpu_defs.h which contains #define's for a specific CPU
main.c Describes how main.c works
node_functions.c Describes how node_functions.c works
parser.y Describes how parser.y works
scanner.l Describes how scanner.l works
show.c Describes how show.c works
user_gen_instr.c Describes how user_gen_instr.c works

 

KPU55 - Verilog code for 16 bit CPU

cpu_params.h CPU specific parameters - opcodes, sizes of memory, registers, etc..
functions.h  
logic_params.h  
debug_asm.h Definitions that can be used to debug assembly language in ModelSim simulations. This makes debugging code in simulation much easier. Instead of seeing binary/hex values for instructions, you can see ASCII text in the waveforms - i.e. "POP R4", "ADD R5, R1, R2", "INC R2", etc..
   
kpu55.v top level of CPU
fetch.v 1st stage of pipeline
decode.v 2nd stage of pipline
execute.v 3rd stage of pipeline
alu.v ALU logic used in execute.v
mem.v 4th stage of pipeline
wb.v 5th stage of pipeline
   
ram.v Code to instantiate Data Memory (Xilinx Block RAMs) for the CPU to use in an FPGA